Semiconductor circuits, regardless of the process used in manufacturing, exhibit a variation in their operating characteristics as a result of process, voltage and temperature (PVT) variations. For example, within a same manufacturing process all of the transistors are not manufactured with precisely the same physical characteristics. Any variation results in a difference in the operating performance of the circuit. Additionally, the temperature that exists at each junction of n-type and p-type material directly affects the performance of the device associated with that junction. After an integrated circuit die is encapsulated or otherwise packaged, the junction temperatures across the integrated circuit die may vary. This variation results in inconsistent circuit behavior. Additionally, as the ambient temperature varies, so does the circuit performance. A third well-known variation that affects semiconductor performance is the variation of a power supply voltage. Generally, transistors operate at a faster speed when a higher power supply voltage is used. However, during operation the power supply voltage may fluctuate from influences such as interference and noise. Other reasons for a variation in the power supply voltage include the switching of numerous transistors at a same time and a varying portable power source, such as a battery.
These variations create a number of serious operational issues. Due to varied operating conditions, the propagation delay and the output impedance of drivers vary widely. Propagation delay is the amount of time it takes for a transistor to switch state once a control signal is applied to make the transistor switch. As a result it is difficult to accurately match impedance from the output of one stage to the input of a successive stage. The lack of accurately matched impedances results in power loss from one stage to another and thus inefficient operation. Variation of the propagation delay seriously impacts the system timing in an integrated circuit, especially at high frequency. Without a constant delay across all operating conditions, system timing is unreliable. To compensate for the propagation delay variation, a timing margin must be built into the system design and that additional margin degrades the integrated circuit's performance.